Dry cleaning method

ABSTRACT

There is disclosed a dry cleaning method capable of totally cleaning and removing particles left at the surfaces of the ultra fine structure of the semiconductor device within the vacuum state without being dependent on a wet cleaning method performed in the surrounding atmosphere. The dry cleaning method of the present invention is carried out such that each of the pads is approached to each of the front surface and the rear surface of a processed item such as the semiconductor wafer and the like, cleaning gas is injected into a fine clearance formed between both of them to generate a high-speed gas flow along the surface of the processed item and the particles left at the surfaces of the processed item are physically cleaned and removed with the high-speed gas flow. In order to assist this physical cleaning action, it is also possible to apply either a chemical cleaning method or an electrical cleaning method under application of plasma. In accordance with the dry cleaning method of the present invention, it is possible to attain the superior cleaning effect corresponding to the cleaning process performed under application of the prior art wet cleaning method without causing the processed to be exposed in the surrounding atmosphere.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] This invention relates to a wafer cleaning method in amanufacturing stage for a semiconductor device, and more particularly atechnology for removing particles left on the wafer surface within avacuum environment after processing with plasma or after flattening withplasma at a pre-stage of the semiconductor manufacturing process.

[0003] 2. Description of the Related Prior Art

[0004] In the prior art cleaning for a semiconductor wafer (hereinafterabbreviated as a wafer), this cleaning operation is carried out suchthat either pure water or solution diluted with various kinds of acidsor alkaline solution is applied, the wafer is immersed in the solutionor the solution is blown against the wafer to wash away the particles atthe surface of the wafer. In addition, a method for mechanicallycleaning the wafer surface with a brush in concurrent with immersion ofwafer in the solution or the like is also used.

[0005] The aforesaid cleaning method of the prior art shows thefollowing problems due to the fact that this is a so-called wet cleaningmethod in which basically water is used for cleaning operation.

[0006] 1) Although a continuous total processing within a vacuumenvironment such as a dry etching or a plasma CVD or the like increasesa machining precision or manufacturing efficiency, cleaning operationrequired after each of the processings is a wet type processing, so thatit generates a necessity for once putting out the wafer into atmosphereand thus the aforesaid effects may not be attained.

[0007] 2) The wet cleaning operation requires a rinsing stage and adrying stage in addition to the cleaning operation, resulting in thatthe number of manufacturing stages is increased.

[0008] 3) In the case of wet cleaning operation, the pole surface of thesemiconductor material is degraded in its quality and as the size of asemiconductor device is made fine, its yield is reduced by the degradedmaterial quality at the surface.

[0009] 4) In the case of performing the wet cleaning operation, liquidis not sufficiently immersed into the fine structural part of thesemiconductor device sometimes due to a surface tension of liquid andcleaning power at the fine structural part is lack.

[0010] 5) A high performance device has required high wet-absorbingmaterial such as organic film or porous organic film as a new materialfor a semiconductor device, in particular, an insulating film materialin the future, and in the case of manufacturing the semiconductor deviceusing these materials, either the wet cleaning or a mere occasionalexposure in the surrounding atmosphere causes a characteristic of thedevice to be deteriorated.

[0011] 6) A wet cleaning is normally carried out under a batchprocessing. In the case that the wafer has 300 mmφ (diameter) or more,it takes much time in cleaning of the wafer and handling before andafter the cleaning.

[0012] In turn, as a cleaning method in place of the aforesaid wetcleaning operation, there is provided a dry cleaning method. As to thedry cleaning method, this method has been disclosed in the gazettes ofJapanese Patent Laid-Open Nos. Hei 8-131981, 8-85887 or 9-17776, forexample.

SUMMARY OF THE INVENTION

[0013] It is an object of the present invention to provide a cleaningmethod performed in vacuum and a dry cleaning method capable ofattaining a cleaning power corresponding to the wet processing even incleaning within vacuum environment in order to solve the problemsaccompanied with the aforesaid wet cleaning.

[0014] A summary of the disclosed invention that is a representative oneof the disclosed inventions will be described in brief as follows.

[0015] The dry cleaning method of the present invention is characterizedin that the front surface and/or the rear surface of the wafer arecleaned by a method wherein each of pads is arranged near or in contactwith the front surface and the rear surface of the processed waferwithin a processing container vacuum evacuated by a vacuum evacuatingmeans and each of the pads is moved relatively in respect to theprocessed wafer while a gas flow is being supplied between the pads andthe processed wafer.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016]FIG. 1 is a basic configuration view for showing a dry cleaningapparatus of a preferred embodiment 1 of the present invention.

[0017]FIG. 2 is an illustrative view for showing one example ofconfiguration of a processed wafer mounting means in a preferredembodiment 1 of the present invention.

[0018]FIG. 3 is a view for showing one example of configuration of a padin a preferred embodiment 1 of the present invention.

[0019]FIG. 4 is a view for showing one example of another configurationof a pad in a preferred embodiment 1 of the present invention.

[0020]FIG. 5 is a view for showing one example of configuration of a padfor cleaning the rear surface in a preferred embodiment 1 of the presentinvention.

[0021]FIG. 6 is a view for showing one example of another configurationof a pad for cleaning the rear surface in a preferred embodiment 1 ofthe present invention.

[0022]FIG. 7 is a view for showing a basic configuration of a drycleaning apparatus in a preferred embodiment 2 of the present invention.

[0023]FIG. 8 is an illustrative view for showing one example of cleaningaction with plasma.

[0024]FIG. 9 is an illustrative view for showing another example ofcleaning action with plasma.

[0025]FIG. 10 is an illustrative view for showing a still furtherexample of cleaning action with plasma.

[0026]FIG. 11 is an illustrative view for showing one example ofconfiguration of a semiconductor-manufacturing device in the preferredembodiment 3 of the present invention.

[0027]FIG. 12 is an illustrative view for showing another example ofconfiguration of a semiconductor-manufacturing device in the preferredembodiment 3 of the present invention.

[0028]FIG. 13 is an illustrative view for showing a still furtherexample of configuration of a semiconductor-manufacturing device in thepreferred embodiment 3 of the present invention.

[0029]FIG. 14(a), FIG. 14(b), FIG. 14(c), FIG. 14(d) and FIG. 14(e) areviews for showing a manufacturing process of semiconductor device inaccordance with the semiconductor-manufacturing device shown in FIG. 12.

[0030]FIG. 15 is a view for showing a basic configuration of a drycleaning apparatus in a preferred embodiment 4 of the present invention.

[0031]FIG. 16(a), FIG. 16(b), FIG. 16(c), FIG. 16(d), FIG. 16(e) andFIG. 16(f) are views for showing a manufacturing process for thesemiconductor device in the preferred embodiment 4 of the presentinvention.

[0032]FIG. 17(a) and FIG. 17(b) are views for illustrating an effect ofcleaning at a fine structural part under application of the dry cleaningmethod of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] Referring now to the drawings, some preferred embodiments of thepresent invention will be described in detail as follows.

[0034] (Preferred Embodiment 1)

[0035] A first preferred embodiment of the present invention and itsoperation in a dry cleaning method of the present invention will bedescribed as follows. An object to be washed here is a circularsemiconductor wafer with a diameter of about 300 mmφ (diameter) forexample.

[0036] In FIG. 1 is shown a basic configuration of a dry cleaningapparatus applied for executing a dry cleaning method in accordance witha first preferred embodiment of the present invention. Within a vacuumcontainer 1 having a vacuum evacuating means (a vacuum pump/not shown)are installed a processed wafer 2 and a processed wafer mounting means 3for mounting the processed wafer 2. The processed wafer mounting means 3is constituted to support the processed wafer 2 at four points of itsperipheral section and has a function to rotate the processed wafer 2 ina circumferential direction by rotating this supporting section. Thepads 4, 5 are arranged near the front surface and the rear surface ofthe processed wafer 2. The pads 4, 5 are provided with a scanningmechanism 6 enabling them to be moved in a horizontal direction on theprocessed wafer 2 and a wafer elevation mechanism 7 arranged near theprocessed wafer 2. Weight sensor means 8 for sensing an applied loadacted between the pads 4, 5 and the processed wafer 2 are mounted on thepads 4, 5. A moving amount of the wafer elevation mechanism 7 iscontrolled by the weight applied between the pads 4, 5 and the processedwafer 2 so as to control a clearance between the pads 4, 5 and theprocessed wafer 2. A plasma generating means 9 is mounted at the upperpart of the vacuum container 1. In the preferred embodiment, a plasmagenerating means using an electromagnetic wave in a microwave band wasused. That is, a microwave oscillation section 23, a wave-guide 24 and adielectric window 25 constitute the plasma generating means 9. CF4 gasis supplied from a gas-feeding segment 21 to a plasma generating section9 a.

[0037] In the preferred embodiment, electromagnetic wave in themicrowave band (practically, 2.45 GHz) is applied at the plasmagenerating means 9. However, either the electromagnetic wave in the UHFband or the electromagnetic wave in a radio-frequency band may be used,and further, a similar effect can be attained even if magnetic fieldsare overlapped on these electromagnetic waves. In brief, whatever typeof means capable of generating plasma may be applied, any type ofmethods may have a similar effect.

[0038] In the preferred embodiment, it is constituted such that theprocessed wafer 2 is arranged within a diffusion area of plasma 22generated by the plasma generating means 9. Arranging the processedwafer 2 within the diffusion area enables excessive damage or the likecaused by plasma 22 to be prevented from being applied to the processedwafer 2.

[0039] As a temperature control means 20 for the processed wafer 2, aninfrared ray lamp is installed and a temperature of the processed wafer2 can be controlled in a range from a room temperature (about 25° C.) to300° C. under radiation of infrared rays 26 from the lamp. The processedwafer 2 is cooled with a gas flow injected from the pads 4, 5 and anoutput of the infrared-ray lamp in the temperature control means 20 iscontrolled in such a way that a temperature of the processed wafer ismade constant in compliance with heating operation performed by theinfrared-ray lamp. In the preferred embodiment, although a temperaturecontrol means for the aforesaid processed wafer is used, if a sufficientcleaning power can be attained without increasing a temperature of theprocessed wafer in particular, it is natural to say that such atemperature control means as above is not necessarily applied.

[0040]FIG. 2 is a top plan view for illustrating a detail of theprocessed wafer mounting means 3. This figure is a view in which theprocessed wafer 2 and the processed wafer mounting means 3 are seen fromabove the processed wafer 2. The outer circumference of the processedwafer 2 is contacted with and held by the four processed wafer mountingmeans 3 while being contacted with it. In addition, the processed wafer2 is rotated by a method wherein each of the processed wafer mountingmeans 3 is rotated as shown in the figure. Application of the processedwafer mounting means 3 shown in FIGS. 1 and 2 enables both surfaces ofthe processed wafer 2 to be released, resulting in that a simultaneouscleaning of both surfaces to be described later can be carried out.

[0041] Then, in FIG. 3 is shown a detailed example of configuration ofthe pad 4 to be approached to the front surface side of the processedwafer 2 and the pad 5 to be approached to the rear surface side of theprocessed wafer 2. The pads 4, 5 arranged near the processed wafer 2 areconstituted by a pad 10 formed by Teflon material arranged near theprocessed wafer 2, a gas feeding section 11, a supporting section 12, anapplied weight detecting means 8, a scanning mechanism 6 for the pad 10and a connecting mechanism 13 for the wafer elevation mechanism 7 andthe like. The connecting mechanism 13 is constructed such that it has anarticulating mechanism capable of controlling a degree of parallel statebetween both surfaces of the processed wafer 2 and the plane of the pad10 around a fulcrum point 14. This structure is operated such that gasis supplied from the gas feeding section 11 to the upper part of the padand the gas is injected between the pad 10 and the processed wafer 2.

[0042] In the preferred embodiment, as shown in FIG. 3, there areprovided one form in which gas is injected from the gas injectingsection 15 formed at one central location of the pad 10 and the otherform in which gas is injected from a gas injection part 16 having aplurality of gas injection holes equally arranged within a plane of thepad 10 as shown in FIG. 4.

[0043] In FIGS. 5 and 6 is shown another example of configuration of thepad 5 near the rear surface of the processed wafer 2. The rear surfaceof the processed wafer where a semiconductor device (for example, MISFETand the like) is not formed in it is scarcely influenced by a mechanicaldamage. Thus, in the preferred embodiment shown in FIGS. 5 and 6, inorder to make a preference cleaning power for the rear surface of theprocessed wafer, the pad and the rear surface of the processed wafer arenot set in non-contacted state as found in the pad shown in the previousFIGS. 3 and 4, but the pad is directly contacted with the rear surfaceof the processed wafer. As shown in FIGS. 5 and 6, the surface of thepad 17 contacted with the processed wafer is of a corrugated shape or abrush-like form. Also in the preferred embodiment shown in FIGS. 5 and6, there is provided a structure in which gas is injected from the gasinjection part 18 in order to prevent some particles removed once fromthe rear surface of the wafer under a particle removing action with thepad 17 from being adhered again to the wafer. And similarly, there isprovided the weight detecting means 19 for controlling a contactpressure of the pad 17 against the rear surface of the processed wafer.

[0044] In the preferred embodiment, although Teflon material is used atthe pad sections of the pads 4, 5, it is apparent that a similar effectto that described above can be attained even if polyvinyl alcohol,Delrin, Bespel, kapton, polyvinyl chloride, polyester, silicon oxide,silicon, and aluminum oxide and the like are applied. Basically, it isdesirable that, as material quality of the pad sections, more softmaterial quality than that at the surface of the wafer 2 is applied.That is, material having a lower hardness than that of the materialconstituting the processed wafer is applied to the portions of the pads4, 5 near the processed wafer surface arranged at both front surface andrear surface of the processed wafer 2. In particular, the pads shown inFIGS. 5 and 6 are directly contacted with the rear surface of theprocessed wafer, so that material such as Teflon or the like showing asoft characteristic against the processed wafer (a silicon wafer) is themost suitable one. Teflon is a polymer made from polytetrafluoroetylene(PTFE).

[0045] In addition, in the preferred embodiment, a size of the surfacesof the pads 4, 5 contacted with the processed wafer is of a diameter of3 cm. A reason why this size is set consists in improving a reachingefficiency of active plasma particles generated by the plasma generatingmeans 9 at the processed wafer 2. That is, if the pad 4 has an excessivesize, the surface of the processed wafer is covered by the pad 4 and theactive particles from the plasma cannot reach the surface of the wafer.Thus, it is necessary that the size of the pads 4, 5 is smaller than thesize of the surface of the processed wafer.

[0046] (Preferred Embodiment 2)

[0047] In FIG. 7 is shown another example of constitution of a drycleaning apparatus for performing a dry cleaning method of the presentinvention. A difference between the constitution of the device shown inFIG. 7 and the constitution of the device shown in FIG. 1 mainlyconsists in a position of the plasma generating means 9. In thepreferred embodiment shown in FIG. 1, the plasma generating means 9 isarranged at the front surface side of the processed wafer 2. This ismainly applied for reflecting the cleaning assist effect of plasmadescribed below against the cleaning of the front surface of theprocessed wafer 2.

[0048] In the case of the cleaning device shown in FIG. 7, the plasmagenerating means is arranged at the side surface of the processed wafer2 to reflect the assist effect of plasma against both front surface andrear surface of the processed wafer 2. It is possible to apply thecleaning assist effect similar to that attained by the plasma to bothsurfaces of the processed wafer 2 under an arrangement of the plasmagenerating means 9 and the rotating function of the processed wafer 2.It is also apparent that a similar effect can be realized under anarrangement of each of the plasma generating means in opposition to bothsurfaces of the processed wafer 2 to make a uniform reflection of thecleaning assist effect at both surfaces of the processed wafer inaddition to the preferred embodiment shown in FIG. 7. Similarly, it mayalso be applicable that the plasma generating means is arranged at theside surface of the wafer opposite to the plasma generating means 9shown in FIG. 7. In the case that it is desired to reflect the cleaningassist effect of the plasma only against the rear surface of the wafer,it is also apparent that the rear surface of the processed wafer isarranged at the side of the plasma generating means 9 in theconstitution of the device shown in FIG. 1.

[0049] Then, an example of cleaning step in the preferred embodimentwill be described.

[0050] At first, the processed wafer 2 to be cleaned is supported by theprocessed wafer mounting means 3. As schematically illustrated in FIG.1, the processed wafer mounting means 3 holds the edge section of theprocessed wafer 2 at a plurality of points, releases both front and rearsurfaces of the processed wafer 2 to enable simultaneous cleaning ofboth front and rear surfaces of the processed wafer 2 to be carried out.

[0051] Then, as already described in reference to FIG. 1, the processedwafer 2 is rotated through rotation of the supporting section of theprocessed wafer mounting section 3. In the case of the preferredembodiment, the rotating speed of the processed wafer 2 is set to 200rpm. In addition, a temperature of the processed wafer 2 is set to 100°C. by the infrared ray lamp constituting the temperature controlmechanism 20. Increasing the temperature of the processed wafer enablesa chemical reaction efficiency at the surface of the processed wafer tobe increased and then a cleaning efficiency may also be increased.

[0052] Subsequently, the pads 4, 5 scan above the processed wafer 2 bythe scanning mechanism 6 while Ar gas is being injected from each of thegas injection segments 15 of the pads 4, 5. In the preferred embodiment,a flow rate of Ar gas injected from each of the pads 4, 5 was set to 20litter/min. The injected Ar gas is discharged out of the device tosurrounding atmosphere by a discharging means mounted at the vacuumcontainer 1.

[0053] Then, plasma of mixture gas of CF4 fed through a gas feedingmeans 21 and Ar gas fed by the pads 4, 5 is generated by the plasmagenerating means 9. After producing the plasma, the pads 4, 5 areapproached to the surface of the processed wafer 2 by the waferelevational mechanism 7. At this time, a force acted between the pads 4,5 and the processed wafer 2 is detected by the weight detecting means 19to control a clearance between the surface of the pad and the processedwafer 2. More practically, a space between the pad surface and thesurface of the processed wafer 2 becomes a high pressure state with Argas supplied from the pads 4, 5, and applied weight is generated betweenthe pad and the processed wafer 2 even if the pad 17 is not contactedwith the processed wafer, so that the weight and the flow rate of theflowing gas are managed to enable a space between the surface of the padand the surface of the processed wafer 2 to be controlled.

[0054] As the weight detecting means 19, a piezoelectric element, astrain gauge, a spring, a resilient material, a weight or theircombination can be used. In the preferred embodiment, it is controlledsuch that a space between the surface of the pad and the surface of theprocessed wafer 2 becomes 5 to 20 μm. However, a similar effect asdesired can also be attained by setting a space between the surface ofthe pad and the surface of the processed wafer to a range of 1 to 100μm. When a space between the surface of the pad at the pad 4 and thesurface of the processed wafer is set to 1 μm or less, it becomesdifficult to keep the space constant and at the same time if bothelements are approached too near, a possibility where they are contactedto each other becomes high and a certain damage is induced at thesurface of the processed wafer 2, resulting in that practically a spaceof 1 to 100 μm is the most effective range. In addition, a space betweenthe pad 5 for cleaning the rear surface of the processed wafer 2 and therear surface of the processed wafer does not show any problem at alleven if the pad 5 is arranged to be directly contacted with the rearsurface of the processed wafer due to the fact that it is not needed totake care of a certain damage as found in the surface of the wafer.However, in the case that they are directly contacted to each other, itis necessary to manage the applied weight between the pad 5 and the rearsurface of the processed wafer 2, and the rear surface is also cleanedwith a specified pressing pressure. In addition, in the case that thepad 5 is directly contacted with the rear surface of the processedwafer, the cleaning power can be increased under application of the padsshown in FIGS. 5 and 6.

[0055] In the preferred embodiment, although Ar gas is applied as gassupplied from the pads 4, 5, it is also apparent to say that a similareffect can be realized even if nitrogen, He, Xe and Ne are used.Additionally, in the preferred embodiment, a flow rate of the gasflowing between the pads 4, 5 and the processed wafer 2 is set to 20litters/min, a similar effect can be attained under a gas flow ratewithin a range of 0.5 to 500 litters/min. It is natural to say thatalthough the more the flow rate of gas, the higher the cleaning poweronly in reference to the cleaning power, 0.5 to 500 litters/min. is apractical range in reference to the problem of increasing in cost causedby the amount of consumption of gas. The pads 4, 5 in which the space inrespect to the processed wafer 2 is controlled are operated to scan overthe processed wafer 2 by the scanning mechanism 6, it becomes possibleto scan the entire surface of the processed wafer 2 in compliance withthe rotation of the processed wafer.

[0056] In the preferred embodiment, although the rotating mechanism forrotating the processed wafer 2 has been used, a similar effect may alsobe attained in the case that a mechanism for rotating the pads 4, 5 or amechanism for rotating the processed wafer and a mechanism for rotatingthe pad itself may also be used together with it.

[0057] Then, a cleaning procedure in accordance with the dry cleaningmethod of the present invention will be described as follows.

[0058] At first, functions of the pads 4 and 5 will be described. Thepads 4 and 5 mainly perform the cleaning and removal of particlesadsorbed at the front surface or the rear surface of the processed waferunder application of a physical force. However, in the case of thesurface of the processed wafer where a ultrafine semiconductor device isformed, if the pad 4 is directly contacted with the surface of theprocessed wafer, an excessive physical force acted on it becomes toohigh and the surface of the processed wafer is damaged. Due to thisfact, in the preferred embodiment, this structure is made such that gasis flowed between the pad 4 and the surface of the processed wafer 2 anda physical force is indirectly acted on the surface of the processedwafer through the gas. The gas flow is generated between the pad 4 andthe surface of the processed wafer 2 to enable a frictional stress ofthe gas flow to be acted against the surface of the processed wafer. Dueto this fact, it is possible to generate a high substance moving forcewhile not being contacted to each other. In addition, it becomespossible to generate a high speed gas flow having an effective cleaningpower over a wide range by feeding gas into a fine clearance betweenthem while the pad 4 and the surface of the processed wafer 2 areapproached to each other. Further, the cleaning power generated by thishigh gas flow speed is determined by the space of clearance and the gasflow rate, so that the cleaning power can be precisely controlled onlythrough control of the pressing force acted between the pad 4 and thesurface of the processed wafer 2 and the flow rate of the gas. Both lowdamage characteristic and high cleaning power can be attained by thisprecise cleaning power control function. In addition, it becomespossible to act the cleaning power against all the portions of the finestructure formed at the surface of the processed wafer 2. Due to thisfact, a high efficient physical cleaning power can be attained at theultra fine semiconductor structure where the cleaning action with thesurface tension is not provided by the wet cleaning action. In regard tothe pad structure 6 for cleaning the rear surface of the processedwafer, this is basically the same as that of the surface cleaning,although it is not necessary to take care of the damage, resulting inthat as shown in FIGS. 5 and 6, the pad of the pad structure is directlycontacted with the rear surface of the processed wafer to clean it andthen a high particle removing capability can be realized.

[0059] Then, referring now to FIGS. 8, 9 and 10, a function of theplasma generating means 9 will be described as follows.

[0060] The function of plasma shown in FIGS. 8, 9 and 10 consists indampening an adsorbing force of some particles which are hardly removedonly through the physical action attained by the pad 4 described aboveand improving a cleaning efficiency (the cleaning action is assisted).

[0061] At first, in FIG. 8 is shown a procedure for dampening theadsorbing power of particles 30 electrostatically with the plasma 27.The particles 30 electrically charged with minus are electrostaticallyadsorbed at the surface 31 of the wafer after manufacturing of thesemiconductor under application of plasma etching or sputtering process.However, an electrostatical suction force 29 against the particles 30 isgenerated in the ion sheath 28 by the plasma charge in the thin plasmagenerated by the plasma generating means 9 of the preferred embodimentand it is possible to increase (assist) the cleaning power under aphysical action by the pad 4 or 5.

[0062] Then, in FIG. 9 is shown a procedure for dampening the adsorbingpower when the particles 30 are chemically adsorbed at the surface 31 ofthe processed wafer. Normally, in the case that the particles 30 arechemically adsorbed at the surface 31 of the processed wafer, anoxidization reaction is generated at a contact surface between theparticles 30 and the surface 31 of the processed wafer. That is, thechemical adsorbing power is generated through giving or receiving someelectrons between the particles 30 and the surface 31 of the processedwafer. Under this state, the adsorbing power of the particles 30 isproduced under giving or receiving of electrons between the particles 30and the surface of the wafer through the chemical adsorbing layer 33 ina chemical reaction concept. In view of this fact, high oxidized activeelements 32 such as ozone or oxygen radicals and the like are producedby generating plasma through supplying oxygen gas, the aforesaid givingor receiving electrons (exchanging action) is transferred between theparticles 30 and the active elements 32 from between the particles 30and the surface 30 of the wafer, thereby the aforesaid chemicaladsorbing power of the particles can be dampened. It is apparent to saythat also supplying these mixture gases of oxidization-reducing gasincluding nitrogen, hydrogen or oxygen in the plasma can attain asimilar effect.

[0063] Further, a cleaning auxiliary action through lift-off functionshown in FIG. 10 will be described.

[0064] In the preferred embodiment, CF4 gas is supplied to the plasmagenerating means 9 in addition to Ar gas supplied from the pads 4, 5.This CF4 gas is dissociated into high reactive halogen radicals 35 suchas F, CF3 through generation of the plasma. These halogen radicals 35etch (lift off) a quite small amount of either silicon or silicon oxidefilm on the surface 31 of the processed wafer to cause the particles 30melted into or bitten into the surface 31 of the processed wafer to beeasily removed and a physical cleaning power attained by the pad isincreased. That is, the surface 34 of the wafer before cleaningoperation is etched back to reduce a contact area of the particles 30against the surface 31 of the wafer. Due to this fact, the particles 30can be easily removed.

[0065] In the preferred embodiment, although the dissociated componentof CF4 gas has been applied, it is apparent that a similar lift-offeffect can be attained even if dissociated substances such as C2F6,C3F8, C12, F2, NF3, HF, ammonia and hydrogen gas and the like areapplied. In addition, since the particles adsorbed to the surface of theprocessed wafer are adsorbed in various forms, it is apparent that eachof the cleaning auxiliary actions described in reference to FIGS. 8, 9and 10 is not applied independently but they are acted in their mergedstate to remove particles.

[0066] A high efficient cleaning of the wafer within the vacuum oratmosphere of lower pressure can be carried out under a combination ofphysical action by the pad, a chemical action with plasma and anelectrical action.

[0067] In particular, the dry cleaning method of the present inventioncan realize a sufficient cleaning effect against the fine structurethrough application of it to the manufacturing of the semiconductordevice having a fine through-hole structure with an inner diameter beingless than 0.3 μm. Due to this fact, it becomes possible to manufacture asemiconductor device in a low cost and with a high yield.

[0068] In the aforesaid preferred embodiment, the physical cleaningaction caused by the pads 4, 5 is assisted by the reaction of theplasma, although as another preferred embodiment, an ultraviolet raylight source in place of the plasma generating means 9 is used, asimilar chemical action can be attained even after exciting the reactiongas fed into the vacuum state by the ultraviolet ray and the physicalcleaning action with the pads 4, 5 can be assisted.

[0069] Further, a lift-off function against either silicon or siliconoxide film in the previous preferred embodiment can be realized byapplying either fluoric acid vapor or mixture gas of fluoric acid andwater vapor as another preferred embodiment in place of the productionof plasma and the physical cleaning action with the pads 4, 5 can beassisted by it.

[0070] Further, the assist effect against the particle removing actionin the aforesaid preferred embodiment can be attained also under acombination of other optional particle removing means in addition to thecombination with the particle removing means of the high-speed injectiongas flow from the pads 4, 5 described above. For example, it may also beapplicable that there is provided a combination with the particleremoving means under utilization of high-speed gas flow attained by thehigh-speed discharging (an effective discharging speed: 800 litters/sec.or more) with the discharging means accompanied by the vacuum container1, for example.

[0071] In addition, a main process (an etching process for anoxidization film) and a cleaning process may be performed continuouslywithin the vacuum container 1 (the processing chamber) in themanufacturing process for the semiconductor device using the drycleaning apparatus shown in FIG. 1. At the main plane of wafer of alocation where it is not covered by the pad is carried out an etchingoperation and further at the main plane of the wafer where it is coveredby the pad is carried out a cleaning operation.

[0072] In such a method as described above, the etching operation andthe cleaning of the reaction produced material becoming the particlesgenerated at the time of etching operation can be performed moreefficiently.

[0073] (Preferred Embodiment 3)

[0074] Then, there will be described a method for manufacturing asemiconductor device using the present invention.

[0075] In FIG. 11 is shown an example of configuration of thesemiconductor device manufacturing apparatus in the case that a cleaningfunction of the present invention is added to either a dry etching or aplasma CVD or a sputtering device. Referring to FIG. 11, the method formanufacturing the semiconductor device will be described.

[0076] In the prior art, the wafer was once placed in the surroundingatmosphere after processing of the dry etching at the wafer and then thewet cleaning was carried out. The apparatus for manufacturing thesemiconductor device shown in FIG. 11 is provided with cleaning chambers38, 39 which are similar to that shown in FIG. 1, for example, inaddition to the main process chambers 36, 37 such as etching chambers orthe like. The wafer before processing is transferred from a wafer inletcassette 42 into a wafer transferring chamber 41 by an arm 40. The waferafter the main processing and after the cleaning processing istransferred by the arm 40 into the wafer outlet cassette 43 and storedthere.

[0077] In accordance with the preferred embodiment of the presentinvention, upon completion of the main process for the wafer (forexample, a machining step for a wafer such as a dry etching and thelike), the wafer is transferred into the cleaning chambers 38, 39 by thewafer transferring arm 40 within the wafer transferring chamber 41without being exposed in the surrounding atmosphere and its cleaningprocessing is carried out. With such an arrangement as above, in view oftotal processing step, it is possible to eliminate any surplus stepaccompanied by the wet cleaning operation and to reduce a manufacturingcost of the semiconductor device. In addition, since the wafer istotally processed within the vacuum atmosphere, a probability in which asurface quality at the wafer after processing is deteriorated isreduced, a device characteristic and a yield are improved and at thesame time its throughput is also improved.

[0078] In FIG. 12 is shown an example of modified application of thepreferred embodiment shown in FIG. 11. This is an example in which thepost-processing chambers 44, 45 are arranged in addition to the mainprocessing chambers 36, 37. More practically, the main processing stepis applied as an etching processing step and a post-processing step isapplied as an ashing process for removing a resist-mask. That is, theashing processing is carried out within the post-processing chambers 44,45 after the etching processing is performed at the main processingchambers 36, 37. Then, further after this operation, the cleaningprocessing in the cleaning chambers 38, 39 is carried out. In this way,in the preferred embodiment, the main processing step, a post-processingstep and a cleaning step in the present invention are totally performedin the vacuum. With such an arrangement as above, the wet cleaning stepwithin the surrounding atmosphere after etching processing can beeliminated, a problem of degrading at the surface of the wafer that isinconvenient as described above can be avoided, cleaning and removal ofthe particles at the fine structural part can be carried outeffectively, resulting in that both a precision in manufacturing afterthe manufacturing step and a yield of manufacturing can be improved.

[0079] In the preferred embodiment shown in FIGS. 11 and 12, theconstitution of the device having each of the two main process chamberand post-processing chamber has been described above, although this isan example in which the two chambers are applied to improve a massproduction characteristic, and it is apparent to say that even if acleaning chamber of the present invention shown in FIG. 1 is added tothe configuration of the device having each of one main processingchamber or post-processing chamber, a similar effect can be attained.

[0080] The apparatus for manufacturing a semiconductor device shown inFIG. 13 is operated such that not only the single processing within thevacuum as described above, but also a plurality of processings withinthe vacuum are totally carried out within the vacuum without exposingthe wafer to the surrounding atmosphere even once during each of theprocessings. That is, a plurality of processing chambers 47 in thisapparatus for manufacturing a semiconductor, i.e. a module are connectedto and arranged in a multi-chamber type transferring chamber 46, and atleast one or more of these plurality of processing chambers areconstituted by the cleaning chamber 48 of the present invention as shownin FIG. 1.

[0081] In accordance with the preferred embodiment, a high efficientcleaning processing can be realized within the vacuum and the number ofsteps that can be totally processed are increased. In this way, as thenumber of steps that can be totally processed within the vacuum isincreased, the manufacturing cost and the throughput of thesemiconductor device are increased, its machining accuracy is alsoincreased, resulting in that it becomes possible to manufacture the lowcost and higher performance semiconductor device.

[0082] In this case, referring to FIGS. 14(a)˜14(e), the process formanufacturing the semiconductor device through the manufacturing moduleshown in FIG. 13 will be described as follows.

[0083] FIGS. 14(a)˜14(e) are a step diagram for showing a process inwhich a through-hole with a hole inner diameter less than 0.3 μm and anaspect ratio of 50 or more (a film thickness/a hole inner diameter) isformed at an oxidization film on the wafer. An oxidization film 100 isan inter-layer insulation film formed between an upper layer wiring anda lower layer wiring.

[0084] (a) A semiconductor substrate (wafer) having a poly-siliconmaster 101 formed with a patterning on an oxidization film 100 isprepared. This polysilicon master 101 is made such that an opening 101 afor use in forming the through-hole is formed with a patterning by anormal photo-lithography technology. Then, the wafer 2 is stored in awafer inlet cassette 42 shown in FIG. 3 (FIG. 14(a)).

[0085] (b) Subsequently, the wafer 2 is transferred through apreliminary chamber into a multi-chamber type transferring chamber 46shown in FIG. 13. Then, at first, the aforesaid wafer 2 is transferredby the wafer-transferring arm 40 into the processing chamber A. Withinthe processing chamber A, further polysilicon layer 102 is accumulatedon the polysilicon mask 101 through the CVD process (FIG. 14(b)).

[0086] (c) The wafer 2, after passing through the aforesaid CVD process,is transferred into the cleaning chamber A and cleaned there. After thiscleaning operation, the wafer 2 is transferred into the processingchamber B and the poly-silicon layer 102 is left only on a sidewall ofthe opening part of the mask 101 through a dry etching (anisotropicetching) for the polysilicon layer 102. In accordance with this method,it is possible to form the opening 101 b having a smaller inner diameterthan the inner diameter of the opening 101 a in self-alignment manner inrespect to the opening 101 a of the mask 101 (FIG. 14(c)).

[0087] (d) Subsequently, the aforesaid wafer 2 is transferred into thecleaning chamber B shown in FIG. 13, where the cleaning operation iscarried out again to it. Then, the oxidization film 100 is processedwith the dry etching within the processing chamber C to form thethrough-hole 100 a in the oxidization film 100. This processing chamberC is constituted by the plasma processing device disclosed in thegazette of Japanese Patent Laid-Open No. Hei 9-321031, for example (FIG.14(d)).

[0088] (e) Upon forming of the through-hole through the aforesaidoxidization film etching process, some accumulated organic films duringthis oxidization film etching process are further processed with ashingprocess at the processing chamber D and removed from this chamber. Thewafer after being processed with this ashing process is transferred intothe wafer outlet cassette 43 (FIG. 14 (e)).

[0089] The aforesaid series of processes (a) to (e) enable at first thethrough-hole 100 a having a smaller reduced inner diameter size than aninner diameter size of the opening 100 a formed through patterningprocess at the polysilicon master 101 to be machined and formed withinthe oxidization film 100, resulting in that the machining with amachining size less than a limit value in a normal lithographytechnology.

[0090] Further, in accordance with the preferred embodiment of thepresent invention, the aforesaid series of processes that are carriedout within the vacuum state under application of the manufacturingmodule of the present invention shown in FIG. 13 enable themanufacturing of the semiconductor device to be realized under a quitelow cost as compared with that required in the wet cleaning processperformed under the surrounding atmosphere in the prior art where itshould be carried out during each of the processing steps.

[0091] Further, in accordance with the present preferred embodiment,some continuous processing steps including a CVD step, a polysiliconetching step, an oxidization film etching step and an ashing step aretotally performed within the vacuum state, so that a cause reducingyield such as natural formation of oxidization film produced by itsexposure in the surrounding atmosphere is eliminated and a machiningsize precision in forming the through hole is also improved.

[0092] (Preferred Embodiment 4)

[0093] In FIG. 15 is illustrated an example of configuration of the drycleaning apparatus which is different from the preferred embodimentsNos. 1 and 2 shown in the previous FIG. 1 or FIG. 7. In theconfiguration of the device shown in FIG. 15, a cooling gas blowingmeans 49 is arranged in place of the previous pads for use in cleaningthe rear surface of the processed wafer 2. When either carbonic acid gasor nitrogen gas is cooled, the cooling gas is fed into the vacuumcontainer 1 through the gas feeding mechanism 51, the gas is injectedinto the vacuum container 1 by the cooling gas blowing means 49 such asa fine nozzle and the like, some fine iced particles 50 are formed. Theiced fine particles 50 have a relative high kinetic energy due toinjection of the aforesaid gas and then the particles left on the rearsurface of the processed wafer are struck and removed with this kineticenergy.

[0094] Referring now to FIG. 16(a)˜FIG. 16(f), there will be describedas follows a series of processing processes in this case of applying thecleaning method of the present invention to the MISFET forming processthat is a basic portion of the semiconductor device made on theprocessed wafer.

[0095] Schematically shown in FIG. 16(a)˜FIG. 16(f), the formation ofMISFET is carried in sequence of (a) an element separation andpolysilicon accumulation for a gate; (b) a gate electrode formation(polysilicon etching); (c) an extension (N-region) formation with ionimplantation; (d) a nitrized film accumulation; (e) a gate electrodeside wall protection film formation (a nitrized film etching); and (f) asilicide layer formation. A dry cleaning processing which is similar tothat described in the previous preferred embodiment is carried out ateach of the steps (a) to (f) described above.

[0096] Each of the steps (a) to (f) above will be described in brief asfollows.

[0097] (a) At first, a groove separating region 54 for use in separatingelements is formed at a silicon wafer 52. The silicon wafer 52 is aproduct where a P-well is formed at a P-type wafer. Subsequently, a gatepolysilicon layer 53 is accumulated through a gate oxidization film (notshown). This gate polysilicon layer 53 is formed by a CVD method withina vacuum processing chamber (FIG. 16(a)).

[0098] (b) A dry etching process for the polysilicon layer 53 is carriedout within the vacuum processing chamber to form a gate electrode 55(FIG. 16(b)).

[0099] (c) Extensions (N-region) 56, 57 aligned with the gate electrode55 are formed by an ion implanting process. The extensions are of asource-drain region having a relative low concentration formed as acountermeasure against hot electron (FIG. 16 (c)).

[0100] (d) A nitrized film 58 is accumulated by a plasma CVD method onthe semiconductor wafer 52 having the gate electrode 55 (FIG. 16(d)).

[0101] (e) The nitrided film 58 is dry etched (anisotropic etching) toform the gate sidewall protection film 59 at the sidewall of the gateelectrode 55. After this operation, the dry cleaning described inreference to the aforesaid preferred embodiment is performed. Furtherafter this operation, N+ regions (source, drain regions) 56S, 57D forcontact having a relative high concentration aligned with the gatesidewall protection film 59 are formed by an ion implanting process(FIG. 16(e)).

[0102] (f) Subsequently, each of silicide layers 60 is formed at thesurfaces of the source region 56S, drain region 57D and the surface ofthe gate electrode 55, respectively, to attain a low resistance. Thissilicide layer 60 is formed by a method wherein a cobalt layer, forexample, is adhered to the surfaces of the source region 56S, the drainregion 57D and the surface of the gate electrode 55 and they areprocessed with heat (FIG. 16(f)).

[0103] As described above, in accordance with the preferred embodimentof the present invention, since the cleaning processing at each of thesteps in the MISFET forming process is carried out by a dry cleaning, itbecomes possible to improve a yield in manufacturing and manufacture ahigh performance semiconductor device in a low cost.

[0104] In the present preferred embodiment, the manufacturing processfor the semiconductor device has been described in reference toformation of MISFET. Practically, a plurality of such MISFETs as aboveare formed and semiconductor integrated circuit devices such as LSI,VLSI are constituted. Accordingly, some fine structures with a size of0.3 μm or less shown in FIGS. 17(a) and (b) are present at all locationson the wafer main plane. A cleaning effect at the wafer surface havingsuch fine structures as above will be described as follows.

[0105]FIG. 17(a) is an illustration for showing a function to remove aparticle 66 adhered to the inside part of a deep well contact 64. FIG.17(b) is an illustration for showing a function to remove the particle66 adhered to a corner part (a step part in the wiring) of a wiring 67.

[0106] As shown in FIG. 17(a) and FIG. 17(b), since a physical actionfor removing the particle 66 is generated by a viscous friction causedby a gas flow 63 at a clearance 62 between the pad 61 and the surface 2a of the wafer, a sufficient cleaning effect can be realized if theregion is in a range where the gas flow reaches.

[0107] In the case of the prior art wet cleaning process, liquid ishardly immersed into the fine structure due to surface tension ofliquid, it may be assumed that a sufficient cleaning effect may not beattained at the fine structure with a size of 0.3 μm or less. However,in the case of dry cleaning process of the present preferred embodiment,the gas flow having no such a surface tension as above enables a problemof reducing a cleaning power with the aforesaid surface tension to beavoided. Accordingly, the present invention can realize a substantialeffect in the cleaning process for the semiconductor device of whichsmall-size formation in the future is expected.

[0108] The cleaning method of the present invention is especiallyeffective in the case of manufacturing LSI in which a memory LSI and alogic LSI are merged on a chip, for example, and an efficient cleaningprocess enables the system LSI to be manufactured within a short periodof time, in a low cost and with a high yield.

[0109] Although the dry cleaning method and the preferable configurationof the device for carrying out the method of the present invention havebeen described more practically above in reference to various kinds ofpreferred embodiments, it is of course apparent that the presentinvention is not limited to these preferred embodiments and variousmodifications can be realized without departing from its scope.

[0110] [Effects of the Invention]

[0111] Some effects attained by a representing invention disclosed inthe present patent application are described in brief as follows.

[0112] In accordance with the present invention, it is possible toperform a cleaning of the processed wafer totally in the vacuum chamberand further it becomes possible to perform a simultaneous cleaning ofboth front surface and rear surface of the processed wafer, the appliedrange of the cleaning processing can be expanded and concurrently bothimproving of yield in manufacturing of the semiconductor device and lowcost become possible.

What is claimed is: 1) A dry cleaning method wherein each of pads isarranged near or in contact with both front surface and rear surface ofa processed wafer within a vacuum container evacuated by a vacuumevacuating means, gas is supplied between each of said pads and saidprocessed wafer, said pads are relatively moved in respect to theprocessed wafer to clean the front surface and the rear surface of theprocessed wafer. 2) A dry cleaning method according to claim 1 wherein asize of each of said pads arranged near or in contact with both frontsurface and rear surface of a processed wafer is smaller than a diameterof the processed wafer. 3) A dry cleaning method according to claim 1 orclaim 2 wherein means for forming a plasma is added in a vacuumcontainer and the surfaces of the processed wafer are cleaned under anaction of said plasma and the pads arranged at said front surface andsaid rear surface. 4) A dry cleaning method wherein gas is supplied in aclearance between pads arranged at each of the front surface and therear surface of a processed wafer, pressures acted on the pads arrangedat the front surface and the rear surface of the processed wafer aredetected, a pressing force of the pads against the processed wafer iscontrolled in such a way said pressures may become constant to controlthe clearance between the processed wafer and each of the pads and thenthe front surface and the rear surface of said processed wafer arecleaned with said gas. 5) A dry cleaning method according to claim 4wherein the method for supplying gas into a clearance between each ofsaid pads and said processed wafer is carried out by a structure inwhich the gas is injected toward the surface of said processed waferthrough a gas injection hole formed at the central part of a plane ofeach of said pads contacted with the surface of the processed wafer. 6)A dry cleaning method according to claim 4 wherein the method forsupplying gas into a clearance between each of said pads and saidprocessed wafer is carried out by a structure in which the gas isinjected toward the surface of said processed wafer through a pluralityof gas injection holes formed at the plane of each of said padscontacted with the surface of the processed wafer. 7) A dry cleaningmethod according to claim 4 wherein means for detecting pressure actedagainst said processed wafer and the pads arranged at the front surfaceand the rear surface of said processed wafer is any one of apiezoelectric element, a spring, a resilient material, a strain gauge, aweight or a combination of these elements arranged between each of thepads and means for holding said pads. 8) A dry cleaning method accordingto claim 7 wherein there are provided a plurality of means for detectingpressure acted against said processed wafer and the pads arranged at thefront surface and the rear surface of said processed wafer, and aclearance between each of said pads and said processed wafer iscontrolled in such a way that the pressures detected by means fordetecting each of the pressures may become equal. 9) A dry cleaningmethod according to claim 1 wherein a relative motion between each ofthe pads arranged at the front surface and the rear surface and theprocessed wafer is made effective by rotating said pads in a directionof plane in respect to the plane of the processed wafer and by scanningsaid pads over the plane of the processed wafer. 10) A dry cleaningmethod according to claim 1 wherein as material quality of a part ofeach of the pads arranged at the front surface and the rear surface ofsaid processed wafer, material having a lower hardness than that of thematerial constituting the surfaces of the processed wafer. 11) A drycleaning method according to claim 10 wherein as material quality of apart of each of the pads arranged at the front surface and the rearsurface of said processed wafer, any one of materials such as a polymermade from polytetrafluoroetylene, polyvinyl alcohol, polyvinyl chloride,polyester, silicon oxide, silicon and aluminum oxide. 12) A dry cleaningmethod according to claim 3 wherein one kind of oxygen, nitrogen,hydrogen, NF3, NH3, HF, CF4, C2F6, C3F8, F2, C12, He, argon, neon andxenon or more than two kinds of these gases are mixed to each other bymeans for forming plasma, fed to form plasma, the particles left on thesurface of the processed wafer are removed under a relative actionbetween said plasma and the surface of the processed wafer and each ofthe pads moved in respect to the surface of the processed wafer. 13) Adry cleaning method according to claim 12 wherein as major gas suppliedto a clearance between each of the pads and the surface of saidprocessed wafer, any one kind of Ar, nitrogen, He, Ne is applied. 14) Adry cleaning method according to claim 13 wherein an amount of saidsupplied gas is in a range of 0.5 litter/min. or more to 500litters/min. or less. 15) A dry cleaning method according to claim 1wherein a clearance between one pad and the surface of the processedwafer is in a range of 1 μm or more to 100 μm or less and a clearancebetween the other pad and the rear surface of the processed wafer is ina range of 0 to 100 μm or less. 16) A dry cleaning method according toclaim 1 wherein said processed wafer is heated to 300° C. or less. 17) Adry cleaning method according to claim 3 wherein means for forming saidplasma is a method for feeding an electromagnetic wave in a frequencyrange of any one of a microwave band, a UHF band and a radio frequencyband through a dielectric window into a vacuum chamber to form plasma.18) A dry cleaning method according to claim 3 wherein means for formingsaid plasma applies a magnetic field to an electromagnetic wave to formplasma. 19) A dry cleaning method according to claim 3 wherein each ofthe pads arranged at the front surface and the rear surface of saidprocessed wafer is arranged in a diffusion region of plasma formed bysaid plasma forming means. 20) A dry cleaning method according to claim1 wherein the surface of each of the pads for cleaning the rear surfaceof the processed wafer is of a plurality of protrusions or brush-likeforms, and the extremity ends of said protrusions or brush-like formsare contacted with the rear surface of the processed wafer to clean it.21) A dry cleaning method wherein there is provided a processing devicecomprised of a vacuum container of which inner side is evacuated by avacuum evacuating means; a processed wafer mounting means; pads arrangednear or contacted with the front surface and the rear surface of theprocessed wafer; means for controlling a clearance between each of saidpads and said processed wafer; means for supplying gas between each ofsaid pads and said processed wafer; and means for relatively moving saidpads in respect to the processed wafer, and wherein the processed waferis mounted on said processed wafer mounting means, each of said pads isrelatively moved in respect to the processed wafer to remove particlesadhered to the front surface and the rear surface of the processedwafer. 22) A dry cleaning method according to claim 21 wherein a size ofeach of the pads arranged near or in contact with the front surface andthe rear surface of the processed wafer is smaller than a diameter ofthe processed wafer. 23) A dry cleaning method according to claim 21wherein means for forming plasma is added in the vacuum container andthe particles adhered to the surfaces of the processed wafer are removedunder action of said plasma and the pads arranged at said front surfaceand said rear surface.